1. Field of the Invention
The present invention relates to controlling the waveform of a current driver. Particularly, the invention is concerned with a high-speed current driver circuit typical of which is a coil driver for write such as an HDD device.
2. Description of Related Art
In a current driver circuit used for driving a data write coil such as an HDD device, a so-called fly-back voltage is developed by a counter-electromotive force acting on an inductive load, etc. at the time of switching with a driver circuit, which is attributable to an inductive load on a data write coil as a load or inductive load components distributed on drive lines reaching the load, and ringing of a current waveform involving overshoot or undershoot occurs in a driver current. A damping circuit has heretofore been used to suppress such ringing waveform.
FIG. 1 is a block diagram of an output circuit provided with a damping circuit according to a prior art. In a driver circuit 100, a LOAD is connected in a sandwiched fashion between a driver terminal VoX of a driver 110 and an output terminal VoY of a driver 120, and flowing directions of a driver current IO outputted from a driver constant current circuit 150 are switched over from one to the other with complementary input signals inputted from input terminals ViX and ViY, thereby permitting the driver current IO to flow in both directions for the LOAD. Damping circuits 130 and 140 are connected to the output terminals VoX and VoY, respectively, to suppress a ringing waveform of the driver current IO.
FIG. 2 is a block diagram of a driver circuit provided with a damping circuit according to another prior art. In a driver circuit 200, like the driver circuit 100 in FIG. 1, a LOAD is connected in a sandwiched fashion between an output terminal VoX of a driver 110 and an output terminal VoY of a driver 120, and flowing directions of a driver current IO outputted from a driver constant current circuit 150 are switched over from one to the other with complementary input signals provided from input terminals ViX and ViY, allowing the driver current IO to flow in both directions. In this prior art, damping circuits 230 and 240 connected to the output terminals VoX and VoY respectively are each controlled by an externally provided damping control signal Vd, and a current ringing waveform is suppressed with a damping control signal Vd regulated in accordance with the driver current IO, the LOAD and resistive components distributed on drive lines reaching the LOAD, the driver current IO being regulated by an external output current control terminal Vc.
A concrete circuit example of FIGS. 1 and 2 is shown in FIG. 3, in which drivers 110, 120, a driver constant current circuit 150, and a connected LOAD are common to both FIGS. 1 and 2. In the driver 110, a pair of PMOS transistor Q1 and NMOS transistor Q3 are connected together in an inverter fashion to afford a half bridge configuration, and an inverted signal for an input signal from an input terminal ViX is outputted to an output terminal VoX. Likewise, in the driver 120, a pair of PMOS transistor Q2 and NMOS transistor Q4 are connected together in an inverter fashion to afford a half bridge configuration, and an inverted signal for an input signal from an input terminal ViY is outputted to an output terminal VoY. Further, the LOAD is connected to both output terminals VoX and VoY to afford an H bridge configuration, thereby driving the LOAD in both directions. The driver constant current circuit 150, which determines the driver current IO, is a constant current circuit constituted of an NMOS transistor Q5 and supplies the driver current IO to the sources of the NMOS transistors Q3 and Q4 which constitute the H bridge.
Damping circuits (130 and 140 in FIG. 1, 230 and 240 in FIG. 2) are connected between a supply voltage VCC and the output terminals VoX, VoY. Although only the output terminal VoY side is described in FIG. 3, its configuration is also true of the output terminal VoX side, so an explanation of the VoX side will be omitted below.
In the prior art of FIG. 1, diode-connected NPN transistors Q7, Q8 and resistor Rd are connected in series between the supply voltage VCC and the output terminal VoY. When a fly-back voltage is developed by switching operations of the drivers 110 and 120 and a fall of potential from the supply voltage VCC to the output terminal VoY exceeds an amount corresponding to two forward voltages of the diode-connected transistors Q7 and Q8, a damping circuit 140 operates and supplies a damping current Idamp toward the output terminal VoY to perform a damping operation. If the number of diodes connected is increased from two to more, a damping operation start voltage can be set in accordance with the increased number of diodes.
In another prior art illustrated in FIG. 2, the base of the transistor Q7 out of the NPN transistors Q7 and Q8 is controlled with a damping control signal Vd. According to this configuration, the same damping operation as in FIG. 1 is performed, provided the voltage at the output terminal VoY which starts the damping operation is regulated in accordance with the damping control signal Vd. To be more specific, when the voltage at the output terminal VoY has dropped an amount corresponding to two forward voltages of the diodes from the damping control signal Vd, the damping circuit 140 is operated to perform a damping operation.
However, in the prior art illustrated in FIG. 1, the voltage at the output terminal VoY which starts the damping operation is fixed to a fall of potential which is set in the damping circuit 140. The fall voltage becomes a voltage of a fixed value after circuit determination although an appropriate number of diodes to be series-connected can be selected in advance, and therefore it is necessary that optimal operating conditions be re-designed for each load specification and driver current IO. Particularly, in the case where a driver circuit is configured by an integrated circuit, a large amount of time and labor are required from the re-design up to fabrication, thus posing a problem. Even in the same load specification, since there is no means for regulating variations in load characteristics, etc., it is inevitably required to take large the operational margin of the driver circuit, thus making it impossible to make the most of the capability of the driver circuit. Here again is posed a problem.
Besides, if the above regulations are not properly conducted, there is a fear that the following various problems may occur. More particularly, if the damping operation is insufficient, an overshoot or undershoot of the current waveform becomes larger and the write operation to the HDD device cannot be done at high speed. In the worst case, an erroneous write may result. Conversely, in case of an excessive damping operation, other than loss of output current consumption, loss of damping current Idamp in rising increases. As a result, the rising speed of the current waveform is delayed. These are not desirable from the standpoint of circuit operation. FIG. 4 illustrates operating current waveforms of the driver circuits in the conventional configurations of FIGS. 1 and 2. As is seen from FIG. 4, since the damping operation is insufficient, in a switching timing of input signals at the input terminals ViX and ViY there occur a fly-back voltage at each of the output terminals VoX and VoY, with consequent occurrence of a ringing waveform in the driver current IO.
The present invention has been accomplished for solving the above-mentioned problems involved in the prior art techniques referred to above and it is an object of the invention to provide a driver circuit which, with a simple circuit configuration, can perform a stable damping operation without the need of regulating the damping start voltage from the exterior and without being influenced by specification changes of load and driver current IO or by variations between individual components.
In one aspect of the present invention, for achieving the above object, there is provided a current driver circuit having a damping circuit for waveform-shaping an output current at the time of driving a load connected to an output terminal with the output current, the driver circuit being provided with a damping control circuit which outputs a damping control signal to be inputted to the damping circuit to determine a damping operation start voltage at the output terminal, the damping control signal being varied in accordance with the output current and setting a potential difference between a normal operating voltage and the damping operation start voltage at the output terminal to a predetermined value.
In the above driver circuit, even if the normal operating voltage at the output terminal varies according to the output current, the damping control signal outputted from the damping control circuit makes control so that the damping circuit operates while a voltage which has varied a predetermined voltage value from the normal operating voltage at the output terminal is used as a damping operation start voltage.
Thus, it is not necessary to preset and design a damping operation start voltage or regulate it from the exterior in accordance with specifications of load and output current value, and the damping circuit can be operated always in an optimal state. Consequently, such inconveniences as ringing of the current waveform, delay of transition speed, and loss of current consumption, are prevented and a stable damping operation can be ensured without being influenced by specification changes and variations in load and output current.
The above and further objects and novel features of the invention will more fully appear from following detailed description when the same is read in connection with the accompanying drawings. It is to be expressly understood, however, that the drawings are purpose of illustration only and not intended as a definition of the limits of the invention.